Adlink CM3-GF User Manual

TME-104P-CMx-GF-1V7 Revision 1.7 / October 13 ©ADLINK Technology GmbH Hans-Thoma-Str. 11 D-68163 Mannheim http://www.adlinktech.com/ CMx-GF PC/10

TME-104P-CMx-GF-1V7 Rev 1.7 2 (81) Fusion Controller Hub  AMD A55E Extension slots  1 x 32-bit PC/104-Plus  1 x 16-bit PC/104 with full

TME-104P-CMx-GF-1V7 Rev 1.7 3 (81) Block Diagram

TME-104P-CMx-GF-1V7 Rev 1.7 4 (81) 1.2 Ordering Information CMx-GF Models Order number Description 703-0028-10 CM2-GF PC/104-Plus CPU board wi

TME-104P-CMx-GF-1V7 Rev 1.7 5 (81) Cable Sets and Accessories The following options are available for the CMx-GF. Order number Description 763

TME-104P-CMx-GF-1V7 Rev 1.7 6 (81) 1.3 Specifications Electrical Specifications Supply voltage +5 V DC +5 V standby (only needed for suspend

TME-104P-CMx-GF-1V7 Rev 1.7 7 (81) 1.4 Mechanical Dimensions (L x W) 90.2mm x 95.9mm Height Max. 14mm on top side above PCB (incl. heat sprea

TME-104P-CMx-GF-1V7 Rev 1.7 8 (81) Top

TME-104P-CMx-GF-1V7 Rev 1.7 9 (81) 1.5 Heat sink solutions The following heat sink solutions are available for CMx-GF. The heat sink solutio

TME-104P-CMx-GF-1V7 Rev 1.7 10 (81) Passive heat sink: Part Number: 765-0049-11 Suitable for CPU / Temperature Range: CPU T16R 615MHz CPU T4

TME-104P-CMx-GF-1V7 Rev 1.7 11 (81) Remarks:  Heat spreader is mounted with 10 mm spacers. Add 10 mm for the spacers to the measurements for

Technical Manual CMx-GF Document: TME-104P-CMx-GF-1V7.docx Revision 1.7 Copyright ©2013 ADLINK Technology GmbH, All rights reserved Trademarks MS-

TME-104P-CMx-GF-1V7 Rev 1.7 12 (81) 2 Getting Started 2.1 Connector and Jumper Locations Bottom The connector’s pin 1 is always mar

TME-104P-CMx-GF-1V7 Rev 1.7 13 (81) Top The connector’s pin 1 is always marked with a golden triangle. X24 (option) COM X16 (option) C

TME-104P-CMx-GF-1V7 Rev 1.7 14 (81) 2.2 LED indicators The onboard LED indicators provide a convenient way to check the board’s statuses. The

TME-104P-CMx-GF-1V7 Rev 1.7 15 (81) 2.3 Hardware Setup Caution Be sure to observe the EMC security measures. Make sure you are always at t

TME-104P-CMx-GF-1V7 Rev 1.7 16 (81) 3 Module Description 3.1 Processor The AMD Embedded G-Series processor is the world’s first integrated ci

TME-104P-CMx-GF-1V7 Rev 1.7 17 (81) Large High-Performance On-Chip Cache  32KB I-Cache, 32KB D-Cache  512KB L2 per Core Integrated Display

TME-104P-CMx-GF-1V7 Rev 1.7 18 (81)  Supports up to four bus master devices  Supports 40-bit addressing  Interrupt steering supported for

TME-104P-CMx-GF-1V7 Rev 1.7 19 (81)  Up to 192kHz sample rate and 32-bit audio  64-bit addressing capability for DMA bus master and MSI 

TME-104P-CMx-GF-1V7 Rev 1.7 20 (81) Hudson-E1 FCH Block Diagram

TME-104P-CMx-GF-1V7 Rev 1.7 21 (81) 3.3 Graphics-Controller This section lists the graphics features available for the AMD G-Series processor

TME-104P-CMx-GF-1V7 Rev 1.7 i Table of Contents 1 Overview 1 1.1 Introduction ...

TME-104P-CMx-GF-1V7 Rev 1.7 22 (81)  Shader instruction store, using an advance caching system  Advanced shader design, with ultra-threadin

TME-104P-CMx-GF-1V7 Rev 1.7 23 (81) Motion Video Acceleration Features  Supports Adobe® Flash Player 10  UVD acceleration for MPEG4 Part 2

TME-104P-CMx-GF-1V7 Rev 1.7 24 (81) LVDS Configuration To ease usage of these displays it is possible to select the display and backlight supp

TME-104P-CMx-GF-1V7 Rev 1.7 25 (81) LVDS Color Mapping Backlight Connector (X5) Connector type Hirose DF13, 8-pin Adapter cable n/a

TME-104P-CMx-GF-1V7 Rev 1.7 26 (81) Display Voltage Jumpers (X22) Jumper LVDS and Backlight Power Supply Connector type: IDC 6-pin header, 2.0

TME-104P-CMx-GF-1V7 Rev 1.7 27 (81) Ethernet Connector (X10) Connector type IDC 10-pin header, 2.00 mm Adapter cable Article number 862-0018-

TME-104P-CMx-GF-1V7 Rev 1.7 28 (81) 9 PWROK NC 10 +3.3V NC 11 GND GND 12 +12V (only for PC104 slot and backlight power supply) NC 13 +12V (onl

TME-104P-CMx-GF-1V7 Rev 1.7 29 (81)  SATA is configured as SATA AHCI, and CFast is configured as IDE mode. In this configuration, the program

TME-104P-CMx-GF-1V7 Rev 1.7 30 (81) 3.7 PS/2 Interface PS/2-connectors for mouse and keyboard are shared with several system signals. An adap

TME-104P-CMx-GF-1V7 Rev 1.7 31 (81) Pin Signal Pin Signal 1 Speaker 2 Mouse Clock 3 Reset-In 4 Mouse Data 5 KB Data 6 KB Clock 7 GND 8 +5V Stan

TME-104P-CMx-GF-1V7 Rev 1.7 ii 2.3 Hardware Setup ...

TME-104P-CMx-GF-1V7 Rev 1.7 32 (81) 3.8 Load BIOS defaults In rare cases, the system may not start because of certain BIOS settings. If that

TME-104P-CMx-GF-1V7 Rev 1.7 33 (81) A Watchdog Timer is integrated on board and managed with the SMC SEMA functionality. There are multiple way

TME-104P-CMx-GF-1V7 Rev 1.7 34 (81) PIN Signal 1 VCC_USB0/2/4 2 USB0/2/4- 3 USB0/2/4+ 4 GND_USB0/2/4 5 GND_USB1/3/5 6 USB1/3/5- 7 USB1/3/5+ 8

TME-104P-CMx-GF-1V7 Rev 1.7 35 (81) Audio Connector (X1) Connector type IDC 16-pin header, 2.00mm Adapter cable Article number 862-0065-10 P

TME-104P-CMx-GF-1V7 Rev 1.7 36 (81) 3.11 BIOS Programming To recover from special BIOS errors, a Dediprog SF-100 programmer can be used. This

TME-104P-CMx-GF-1V7 Rev 1.7 37 (81) 3.12 Serial Ports Two serial ports are located on one IDC COM header. The ports work in either RS232 or RS4

TME-104P-CMx-GF-1V7 Rev 1.7 38 (81) COM Connector (X24) Connector type: IDC 10-pin header, 2.00 mm Adapter cable: Article number 862-0046-10

TME-104P-CMx-GF-1V7 Rev 1.7 39 (81) RS485-Termination Typically the RS485 cabling is done as a bus system with two or more devices on the bus.

TME-104P-CMx-GF-1V7 Rev 1.7 40 (81) 3.14 SEMA functions The on-board Microcontroller implements power sequencing and SEMA (Smart Embedded Manag

TME-104P-CMx-GF-1V7 Rev 1.7 41 (81) Board Specific SEMA functions Voltages The SMC of the CMx-GF implements a Voltage Monitor and samples sever

TME-104P-CMx-GF-1V7 Rev 1.7 iii BIOS-DISABLE ...

TME-104P-CMx-GF-1V7 Rev 1.7 42 (81) Exception Codes In case of an error, the SMC shows a blink code on the STATUS-LED. This error code is also

TME-104P-CMx-GF-1V7 Rev 1.7 43 (81) SMC Flags The SMC Flags register returns the last detected Exception Code since Power Up and shows the used

TME-104P-CMx-GF-1V7 Rev 1.7 44 (81) 3.15 PC/104-Plus Bus Interface The PC/104-Plus bus is a modification of the standard PCI bus. It allows all

TME-104P-CMx-GF-1V7 Rev 1.7 45 (81) Note: All VI/O pins are connected to +3.3V. The voltages +5V, +12V and -12V are not generated by the on

TME-104P-CMx-GF-1V7 Rev 1.7 46 (81) PC/104 Bus Connector (X14) Pin A B 1 IOCHCK# GND 2 D7 RSTDRV 3 D6 +5V 4 D5 IRQ9

TME-104P-CMx-GF-1V7 Rev 1.7 47 (81) 4 Using the Module 4.1 BIOS The CMx-GF is delivered with a Phoenix Technology BIOS. The default settings

TME-104P-CMx-GF-1V7 Rev 1.7 48 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 49 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 50 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 51 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 iv 4.1 BIOS ...

TME-104P-CMx-GF-1V7 Rev 1.7 52 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 53 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 54 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 55 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 56 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 57 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 58 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 59 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 60 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 61 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 v Acronyms ACPI Advanced Configuration and Power Management Interface AES Advanced Encryption Standard APM Advan

TME-104P-CMx-GF-1V7 Rev 1.7 62 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 63 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 64 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 65 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 66 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 67 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 68 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 69 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 70 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 71 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 vi TCP Transmission Control Protocol TLB Translation Look-aside Buffer UART Universal Asynchronous Receiver Tra

TME-104P-CMx-GF-1V7 Rev 1.7 72 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 73 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 74 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 75 (81) 4.2 Drivers Reserved for future revisions of manual 4.3 Live-LED Programming Reserved for future revisio

TME-104P-CMx-GF-1V7 Rev 1.7 76 (81) 4.5 GPIO programming The following sample code for Linux demonstrates how to control the 9 FCH_GPIO pins

TME-104P-CMx-GF-1V7 Rev 1.7 77 (81)

TME-104P-CMx-GF-1V7 Rev 1.7 78 (81) 4.8 Memory Address Map Address range (dec) Address range (hex) Size Description 1024K - 16384K 100000 -

TME-104P-CMx-GF-1V7 Rev 1.7 79 (81) 4.9 I/O Address Map The system chipset implements a number of registers in I/O address space. These regist

TME-104P-CMx-GF-1V7 Rev 1.7 80 (81) 4.10 Interrupts IRQ System Resource 0 Timer 1 Keyboard 2 Secondary interrupt controller 3 Serial port 2 4

TME-104P-CMx-GF-1V7 Rev 1.7 81 (81) 4.11 DMA Channels DMA Data width System Resource 0 8 bits Available 1 8 bits Available 2 8 bits Available

TME-104P-CMx-GF-1V7 Rev 1.7 1 (81) 1 Overview 1.1 Introduction The standard-sized PC/104 Plus board is intended for applications in areas lik

TME-104P-CMx-GF-1V7 Rev 1.7 Appendix A Appendix A, Contact Information EMEA Headquarters LiPPERT ADLINK Technology GmbH Hans-Thoma-Strasse 11 6

TME-104P-CMx-GF-1V7 Rev 1.7 Appendix B Appendix B, Additional Information B.1 Additional Reading Reserved for future revisions of manual B.2

TME-104P-CMx-GF-1V7 Rev 1.7 Appendix C Appendix C, Getting Help Should you have technical questions that are not covered by the respective manua

TME-104P-CMx-GF-1V7 Rev 1.7 Appendix D Appendix D, Revision History Filename Date Edited by Change TME-104P-CFR_AF_0V0.docx 2012-03-15 OF Draft