Adlink CoreExpress-ECO2 User Manual

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TME-CEM-ECO2-Rev0V4.doc
Revision 0.4 / January 12
©
LIPPERT Embedded Computers GmbH
Hans-Thoma-Str. 11
D-68163 Mannheim
http://www.lippertembedded.com/
CoreExpress-ECO2
CoreExpress Module
Technical Manual
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1 2 3 4 5 6 ... 35 36

Summary of Contents

Page 1

TME-CEM-ECO2-Rev0V4.doc Revision 0.4 / January 12 © LIPPERT Embedded Computers GmbH Hans-Thoma-Str. 11 D-68163 Mannheim http://www.lippertembedded.co

Page 2

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 6 2 Getting Started 2.1 Connector Locations Except for the CoreExpress connector at the bottom side

Page 3 - Table of Contents

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 7 2.2 Carrier Board Considerations The CoreExpress specification defines two types of connectors for

Page 4

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 8 2.3 Hardware Setup Caution Be sure to follow the EMC security recommendations. Make sure you ar

Page 5 - 1 Overview

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 9 3 Module Description 3.1 Processor There are several ATOM E6xx processor (formerly TunnelCreek) mo

Page 6 - Block Diagram

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 10 3.4 Graphics-Controller The CoreExpress-ECO2's graphics controller is integrated in E6xxT CPU

Page 7 - 1.3 Specifications

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 11 3.5 Ethernet Controller MAC Type: PCH internal Gigabit Ethernet Media Access Controller Manufact

Page 8 - Mechanical

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 12 3.14 External Battery The board supports a RTC that provides a battery of 3.0 V. A typical battery

Page 9

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 13 3.16 CoreExpress Bus Interface, V2.1 CoreExpress Connector Connector Part Number: Tyco 3-6316490-

Page 10 - 2 Getting Started

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 14 A37 L_DDC_DATA LVDS 3.3V No A38 L_DDC_CLK LVDS 3.3V No A39 USB_Ap USB2.0 Low voltage Yes A

Page 11

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 15 A81 SD0_WP SDIO 8Bit 3.3V no A82 SD0_CD# SDIO 8Bit 3.3V no A83 SD0_CLK SDIO 8Bit 3.3V no A

Page 12 - 2.3 Hardware Setup

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Technical Manual CoreExpress-ECO2 LiPPERT Document: TME-CEM-ECO2-Rev0V4.doc Revision 0.4 Copyright ©2012 LiP

Page 13 - 3 Module Description

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 16 B1 GND (connected to metal shroud) POWER 0V no B2 PCIE_RXAn PCIexpress AC coupled yes B3 P

Page 14 - 3.4 Graphics-Controller

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 17 B47 USB_Hp (Client) USB2.0 Low voltage yes B48 USB_Hn (Client) USB2.0 Low voltage yes B49 U

Page 15

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 18 B91 HDA_BITCLK HD Audio 1.8V or 3.3V no B92 HDA_DOCK_RST# HD Audio 1.8V or 3.3V no B93 HDA

Page 16 - 3.14 External Battery

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 19 4 Using the Module 4.1 BIOS The CoreExpress-ECO2 is delivered with a Phoenix-Technology EFI-BIOS.

Page 17 - CoreExpress Connector

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 20 Trouble Shooting BIOS Settings It may happen that the BIOS is so badly configured that the CoreExpr

Page 18

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 21 4.3 LEMT Functions The onboard Microcontroller implements power sequencing and LEMT (LiPPERT Enhan

Page 19

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 22 4.4 Troubleshooting PROBLEM: The system will not come up at all, the display is blank and the com

Page 20

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 23 5 Address Maps This section describes the layout of the CPU memory and I/O address spaces. Note

Page 21

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 24 5.2 I/O Address Map The system chip set implements a number of registers in I/O address space. The

Page 22 - (NC): not connected

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 25 5.3 Interrupts IRQ System Resource 0 Timer 1 Keyboard 2 Not used 3 Not used 4 Not used 5 No

Page 23 - 4 Using the Module

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 i Table of Contents 1 Overview 1 1.1 Introduction ...

Page 24 - 4.2 Drivers

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 26 5.4 DMA Channels DMA System Resource 0 User available 1 User available 2 User available 3 Use

Page 25 - 4.3 LEMT Functions

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 27 6 Timings The following timings are for CoreExpress-ECO2 based on PCB rev. 407-0003-10 and SMC fir

Page 26 - 4.4 Troubleshooting

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 28 6.2 WakeUp 6.3 Reset

Page 27 - 5 Address Maps

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Appendix A Appendix A, Further Resources www.lippertembedded.com Where the CoreExpress-ECO2 comes from.

Page 28 - 5.2 I/O Address Map

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Appendix B Appendix B, Contact Information Headquarters LiPPERT Embedded Computers GmbH Hans-Thoma-Straße

Page 29 - 5.3 Interrupts

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Appendix C Appendix C, Getting Help Should you have technical questions that are not covered by the respec

Page 30 - 5.4 DMA Channels

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Appendix D Appendix D, Revision History Filename Date Edited by Change TME-CEM-ECO2-Rev0V0 23-08-2010

Page 31 - 6 Timings

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 ii 3.10 CAN-Bus Interface ...

Page 32 - 6.3 Reset

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 1 1 Overview 1.1 Introduction The CoreExpress CPU board CoreExpress-ECO2 is a powerful yet versatile

Page 33

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 2 Other configurations are possible on request. Block Diagram

Page 34

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 3 1.2 Ordering Information CoreExpress-ECO2 Models Temperature range -20°C … +60°C 813-0012-10 E620

Page 35 - Appendix C, Getting Help

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 4 Environmental Specifications Operating: Temperature range 0 … 60 °C (commercial version) -2

Page 36

TME-CEM-ECO2-Rev0V4.doc Rev 0.4 Page 5 Top Bottom

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