Adlink PXI-2022 User Manual

Advance Technologies; Automate the World.Manual Rev. 2.01Revision Date: October 4, 2010Part No: 50-17032-2010PXI-2020/20228/16-CH 16-Bit 250 KS/sSi

2IntroductionCalibration The PXI-2020/2022 includes a precision on-board reference withvery low temperature drift. This feature not only provides a st

Introduction 31.2 Applications Automotive Testing Cable Testing Transient signal measurement ATE Laboratory Automation Biotech measurement 1.3

4IntroductionTriggersTrigger SpecificationsModel Name PXI-2020/2022Trigger Sources(refer to section 4.4 for details)(1)Software(2)AFI [0..7](3)PXI Sta

Introduction 5Digital I/OGeneral Purpose Timer/Counter (GPTC)Digital I/O SpecificationsModel Name PXI-2020/2022Number of Channel 4 input/outputCompat

6IntroductionTimebase System Auto CalibrationTimebase SpecificationsModel Name PXI-2020/2022Timebase Source(1) Internal: onboard 80MHz oscillator(2) E

Introduction 7General Power Requirements General SpecificationsModel Name PXI-2020/2022DimensionsSingle 3U PXI module, 100mm by 160mm (not including

8Introduction1.4 Performance Notes for Table 1-9:SFDR, SINDA, THD, SNR, ENOB Data are based on belowcondition Gain = 1 0.9803771 KHz input tone, 18

Getting Started 92 Getting Started This chapter describes the proper installation environment, instal-lation procedures, its package contents and bas

10 Getting Started2.2 Package ContentsBefore continuing, check the package contents for any damageand check if the following items are included in the

Getting Started 112.3 Mechanical Drawing and I/O Connectors Figure 2-1: PXI-2020/2022 PCB LayoutThe ADLINK PXI-2020/2022 is packaged in a Euro-card

Copyright 2010 ADLINK TECHNOLOGY INC.All Rights Reserved. The information in this document is subject to change without priornotice in order to improv

12 Getting StartedSMB Connector SMB Connector 1: TRG IO SMB Connector 2: Sync CLK_OUT1 SMB Connector 3: Sync CLK_OUT0 SMB Connector 4: CLK INConne

Getting Started 13TRG IO, as an Output PortConnector type SMBCompatibility 3.3 V TTLOutput Logic LevelOutput low voltage: 0.2 V (max)Output high volt

14 Getting Started2.4 Installing the moduleTo install the PXI-2020/2022 module:1. Turn off the PXI system/chassis and disconnect thepower plug from th

Getting Started 152.5 Software SupportADLINK provides comprehensive software drivers and packagesto suit various user approaches to building a system

16 Getting Started2.6 PCI Configuration1. Plug and Play: As a plug and play component, the card requests aninterrupt number via its PCI controller. Th

Signal Connections 173 Signal ConnectionsThis chapter describes the connectors of the PXI-2020/2022, andthe signal connection between the PXI-2020/20

18 Signal ConnectionsLegend:AIL1114 48AIH11AGND 13 47 AGNDAIL4 12 46 AIH4AIL12 11 45 AIH12AGND 10 44 AGNDAIL5 9 43 AIH5AIL13 8 42 AIH13AGND 7 41 AGNDA

Signal Connections 19Note: Pins 2, 5, 8, 11, 14, 17, 20, 23, 36, 39, 42, 45, 48, 51, 54, and 57 are NC for the PXI-2020.64 AFI2 DGND InputAuxiliary

20 Signal Connections3.2 Analog Input Signal ConnectionThe PXI-2020/2022 provides 8/16 differential analog input chan-nels. The analog signal can be c

Signal Connections 213.2.2 Input Connect Configurations - Differential Input Mode Figure 3-1: Ground-referenced Source and Differential InputThe dif

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22 Signal Connections Figure 3-2: Floating Source and Differential Input AIxHAIxLx = 0, ..., 31Ground Referenced Signal Source To A / D Converter AIG

Function Block and Operation Theory 234 Function Block and Operation Theory The operation theory of the functions on the PXI-2020/2022 isdescribed in

24 Function Block and Operation Theory4.2 Basic AI AcquisitionIn this section, the basic acquisition timing is explained.4.2.1 Analog Input PathThe fo

Function Block and Operation Theory 25ter. Please refer to Table 4-1 below and Section “4.3.4” on page30 for more details.Refer to Figure 4-3 and use

26 Function Block and Operation Theory Figure 4-3: Basic Acquisition Timing of PXI-2020/20224.2.3 AI Data FormatWhen using an A/D converter, users sho

Function Block and Operation Theory 27Description Bipolar Analog Input Range Digital codeFull-scale Range ±10 V ±2.5 VLeast significant bit 305.2 uV

28 Function Block and Operation Theory4.3 ADC Sampling Rate and TIMEBASE ControlThe PXI-2022 supports six timebase sources for analog input con-versio

Function Block and Operation Theory 29an external timebase from the front panel connector AFI[0…7] orthe SMB CLK IN.As you supply the timebase from e

30 Function Block and Operation Theory4.3.4 Sampling Rate Control By specifying different scan interval counter (32-bit) value, differ-ent sam-pling r

Function Block and Operation Theory 314.4 Trigger SourcesIn addition to the internal software trigger, the PXI-2020/2022 sup-ports external digital t

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32 Function Block and Operation Theory Figure 4-7: External Digital Trigger Polarity and Pulse Width Re-quirement.4.4.3 PXI Star Trigger When you sele

Function Block and Operation Theory 334.4.5 Trigger Signal ExportingThe PXI-2020/2022 can export trigger signals to following connec-tors/bus: SMB TR

34 Function Block and Operation Theory4.5 User-controllable Timing SignalsIn order to meet the requirements for user-specific timing and there-quireme

Function Block and Operation Theory 354.5.1 DAQ timing signalsThe user-controllable internal timing-signals contain: (Please referto Section 4.1.4 fo

36 Function Block and Operation Theory4. ADCONV, the conversion signal to initiate a single con-version, which could be derived from internal counter,

Function Block and Operation Theory 374.6 Trigger ModesThere are four trigger modes working with trigger sources to initi-ate different data acquisit

38 Function Block and Operation TheoryThe trigger event occurs after the specified amount of data hasbeen acquired. However, if the trigger event occu

Function Block and Operation Theory 394.6.4 Delay-trigger Acquisition Use delay-trigger acquisition to delay the data collection after thetrigger eve

40 Function Block and Operation Theory4.7 Synchronizing Multiple Modules SSI (System Synchronization Interface) provides the DAQ timingsynchronization

Function Block and Operation Theory 41The 3 internal timing signals could be routed to the PXI trigger busthrough software drivers. Please refer to s

Table of Contents iTable of ContentsTable of Contents... iList of Tables...

42 Function Block and Operation TheoryThe SSI/PXI mechanism1. We adopt master-slave configuration for SSI/PXI. In asystem, for each timing signal, the

Function Block and Operation Theory 434.8 General Purpose Timer/Counter OperationTwo independent 16-bit up/down timer/counter are designedwithin FPGA

44 Function Block and Operation Theory4.8.2 General Purpose Timer/Counter ModesEight programmable timer/counter modes are provided. All modesstart ope

Function Block and Operation Theory 45Mode 2: Single Period MeasurementIn this mode, the counter counts the period of the signal onGPTC_GATE in terms

46 Function Block and Operation TheoryMode 4: Single Gated Pulse GenerationThis mode generates a single pulse with programmable delayand pro-grammable

Function Block and Operation Theory 47Mode 6: Re-triggered Single Pulse GenerationThis mode is similar to mode5 except that the counter gener-ates a

48 Function Block and Operation TheoryMode 8: Continuous Gated Pulse GenerationThis mode generates periodic pulses with programmable pulseinterval and

Calibration 495 CalibrationThis chapter introduces the calibration process to minimize ADmeasurement errors and DA output errors.5.1 Loading Calibrat

50 Calibration5.2 Auto-calibrationBy using the auto-calibration feature of the PXI-2020/2022, thecalibration software can measure and correct almost a

Important Safety Instructions 51Important Safety InstructionsPlease read and follow all instructions marked on the product andin the documentation be

ii Table of ContentsTimebase Exporting ... 304.4 Trigger Sources ...

52 Important Safety Instructions Openings in the case are provided for ventilation. Do notblock or cover these openings. Make sure there is adequates

List of Tables iiiList of TablesTable 1-1: Basic Specifications ... 3Table 1-2: Triggers ...

iv List of FiguresList of FiguresFigure 2-1: PXI-2020/2022 PCB Layout... 11Figure 3-1: Ground-referenced Source and

Introduction 11 IntroductionADLINK's PXI-2020/2022 are simultaneous-sampling multi-func-tion DAQ cards to meet a wide range of application requi